Computer Engineering Department

Computer Engineering Department

On behalf of the Computer Engineering (COE) Department at Qassim Private Colleges, I would like to welcome all respective domestic/international students, current students, and alumni who are visiting this site. The department is a part of College of Computer, which is in Buraydah city in Qassim area. The COE department has a team of highly competent faculty and staff committed to motivating and inspiring students to reach their potential. Faculty are also committed to the continuous improvement of our program to help ensure students success. Our faculties prepare students with academic skills for the professional world and advanced graduate studies. Our Computer Engineering Program, which is accredited by ABET, hands-on experiences and technological innovations in areas such as computer architecture, VLSI, computer network, and soft-core/hard-core system design.

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مها البليهد
عبدالرحمن القعبوبي
عبدالرحمن القعبوبي


Course Title and Code: Computer Architecture, COE308

Credits and contact hours: (3,3)


  1. David A. Patterson and John L. Hennessy, Computer Organization & Design: The Hardware/Software Interface, 3rd Edition, Morgan Kaufmann, 2005
  2. Other supplemental materials: Computer Architecture and Organization by John P. Hayes, 2010.

Specific course information

  1. Brief description of the content of the course (catalog description): Fundamentals of computer design, power, cost, performance, instruction set principles, instruction and arithmetic pipelines, dynamic and speculative execution, precise exception, memory hierarchy, multilevel caches, virtual memory, storage and I/O, multicores, multiprocessors, and clusters, New trends in computer architecture.
  2. Prerequisites or co-requisites: Computer Organization and Assembly Language (COE 205)

Specific goals for the course

Specific outcomes of instruction: After successfully completing the course, students will be able to

  1. Analyze MIPS assembly language code.
  2. Describe and apply integer and floating-point representations and arithmetic.
  3. Compute the execution time, average CPI, and speedup for improvements.
  4. Design the datapath and control logic of simple pipelined/non-pipelined CPUs.
  5. Analyze and compare the performance of different CPU designs.
  6. Analyze the impact of caches and memory organization on performance.

Explicitly indicate which of the student outcomes listed in Criterion 3 or any other outcomes are addressed by the course.

  1. Outcome1:      [Mapped from “c”]
  2. Outcome2:      [Mapped from “i”]

Brief list of topics to be covered

Instruction set architecture versus Organization

Instruction set design

CPU performance and metrics

Computer arithmetic

Processor design

Instruction pipelining

Memory hierarchy

Virtual memory

I/O subsystem and devices

Introduction to multiprocessors, Shared-memory, Cache coherence, Message-passing, Interconnection networks.


Course content

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